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Conference Program
Tuesday, February 28, 2012
08:00 - 09:00 |
Registration |
09:00 - 18:00 |
Workshops
- ASPRIT (IGSSE Seminar Room)
- CSECS (IAS Faculty Club)
- VERFE (IAS Lecture Room)
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Wednesday, February 29, 2012
Thursday, March 01, 2012
08:00 - 09:00 |
Registration |
09:00 - 09:30 |
Welcome |
09:30 - 10:30 |
Keynote:
"Learning from experimental silicon like the SCC"
Sebastian Steibl, Intel Labs Braunschweig
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10:30 - 11:00 |
Coffee Break |
11:00 - 12:30 |
Session 1: Robustness & Fault Tolerance
(IAS Lecture Room; Session Chair: Christian Mueller-Schloer)
Classification-based Improvement of Application Robustness and Quality of Service in Probabilistic Computer Systems
Andreas Heinig, Vincent J. Mooney, Florian Schmoll, Peter Marwedel, Krishna Palem and Michael Engel
A Case Study on Error Resilient Architectures for Wireless Communication
Christian Brehm, Matthias May and Norbert Wehn.
Using Dynamic Task Level Redundancy for OpenMP Fault Tolerance
Oussama Tahan and Mohamed Shawky
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12:30 - 13:45 |
Lunch |
13:45 - 15:15 |
Session 2: Power Aware Processing
(IAS Lecture Room; Session Chair: William Fornaciari)
A Very Fast and Quasi-Accurate Power-State-Based System-Level Power Modeling Methodology
Yang Xu, Rafael Rosales, Bo Wang, Martin Streubuehr, Ralph Hasholzner, Christian Haubelt and Juergen Teich
Static Task Mapping for Tiled Chip Multiprocessors with Multiple Voltage Islands
Nikita Nikitin and Jordi Cortadella
An Architecture for Power Management in Automotive Systems
Andreas Barthels, Joachim Fröschl, Hans-Ulrich Michel and Uwe Baumgarten
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15:15 - 15:45 |
Coffee Break |
15:45 - 17:15 |
Session 3a: Parallel Processing
(IAS Lecture Room; Session Chair: Juergen Teich)
Invasive MPI on Intel's Single-chip Cloud Computer
Isaías A. Comprés Ureña, Michael Riepen, Michael Konow and Michael Gerndt
A Low-Overhead Heuristic for Mixed Workload Resource Partitioning in Cluster-Based Architectures
Davide Zoni, Patrick Bellasi and William Fornaciari
Deterministic Execution Model on COTS Hardware
Frédéric Boniol, Hugues Casse, Eric Noulard and Claire Pagetti
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15:45 - 17:15 |
Session 3b: Processor Cores
(IAS Faculty Club; Session Chair: Klaus Waldschmidt)
Design Principles for Synthesizable Processor Cores
Pascal Schleuniger, Sally A. Mckee and Sven Karlsson
HPC Performance Domains on Multi-core Processors with Virtualization
Panayiotis Petrides, George Nicolaides and Pedro Trancoso
A Generic and Non-Intrusive Profiling Methodology of SystemC Multi-Core Platform Simulation Models
Jens Brandenburg and Benno Stabernack
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17:30 - 18:30 |
Visit to the LRZ, the computer centre for Munich's universities and for the Bavarian Academy of Sciences and Humanities |
18:30 - 19:30 |
Drive to Munich City Centre |
19:30 -
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Social Event: Dinner at Hofbräuhaus |
Friday, March 02, 2012
08:00 - 09:00 |
Registration |
09:00 - 10:00 |
Keynote:
"Restoring Computing's former Glory"
David August, Princeton University
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10:00 - 10:30 |
Coffee Break |
10:30 - 12:30 |
Session 4: Optimization
(IAS Lecture Room; Session Chair: Olaf Spinczyk)
Dynamic Task-Scheduling and Resource Management for GPU Accelerators in Medical Imaging
Richard Membarth, Jan-Hugo Lupp, Frank Hannig, Juergen Teich, Mario Koerner and Wieland Eckert
An Approach for Performance Estimation of Hybrid Systems with FPGAs and GPUs as Coprocessor
Volker Hampel, Thilo Pionteck and Erik Maehle
Work Stealing Strategies for Parallel Stream Processing in Soft Real-Time Systems
Sebastian Mattheis, Tobias Schuele, Andreas Raabe, Thomas Henties and Urs Gleim
Design Space Exploration of Hybrid Ultra Low Power Branch Predictors
Matthew Bielby, Miles Gould and Nigel Topham
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12:30 - 13:45 |
Lunch |
13:45 - 15:45 |
Session 5: Communication & Memory
(IAS Lecture Room; Session Chair: Benno Stabernack)
New Memory Organizations For 3D DRAM and PCMs
Ademola Fawibe, Jared Sherman, Krishna Kavi, David Mayhew and Mike Ignatowski
Vertical Link On/Off Control Methods for Wireless 3-D NoCs
Hao Zhang, Hiroki Matsutani, Yasuhiro Take, Tadahiro Kuroda and Hideharu Amano
SADmote: A Robust and Cost-Effective Device for Environmental Monitoring
Atis Elsts, Rihards Balass, Janis Judvaitis, Reinholds Zviedris, Girts Strazdins, Artis Mednis and Leo Selavo
Streamlined Network-on-Chip for Multicore Embedded Architectures
Gadi Oxman, Shlomo Weiss and Yitzhak Birk
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15:45 - 16:15 |
Closing Session
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Contact
Andreas Herkersdorf
Email: herkersdorf@tum.de
Institute for Integrated Systems
Arcisstrasse 21
80290 Muenchen, Germany
Tel.: +49.89.289.22515
Fax: +49.89.289.28323
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